Apple trademarks its patented "macroscalar" code optimization technology
Apple has filed for multiple patents that reference the concept of "macroscalar processor architecture" beginning at least as early as 2004. Most of the patent filings appear to be "continuation-in-part" applications that incorporate and expand upon previous co-pending patents, which have since been granted.
The patents list Jeffry Gonion as their inventor; he has worked as a Platform Architect at Apple since the company hired him away from Geneva-based semiconductor firm STMicroelectronics in 2003.
It was STMicro that sued Apple in 2010 over the EU trademark rights for "iPad," in what was reported to be an apparent bid to win Apple's business. Apple subsequently released iPhone 4 that summer with STMicro's 3-axis digital gyroscope, and used the company's accelerometer in its 6th generation iPod nano later that same year.
Inside Apple's Macroscalar technology
At Apple, Gonion has developed the concept of the macroscalar processor architecture as a technique for making optimized, efficient use of a processor's execution pipelines by preparing and ordering instructions so they can be executed in parallel as much as possible.
The macroscalar patent summary describes one example of where "a processor receives instructions of a program loop having a vector block and a sequence block intended to be executed after the vector block, where the processor includes multiple slices and each of the slices is capable of executing an instruction of an iteration of the program loop substantially in parallel. For each iteration of the program loop, the processor executes an instruction of the sequence block using one of the slices while executing instructions of the vector block using a remainder of the slices substantially in parallel."
Rather than being a code compiler-driven parallelism technology like Apple's Grand Central Dispatch, which can prepare code written to take advantage of it in the compiler for efficient, parallel execution on existing chips, Macroscalar relates to technologies that appear to depend on custom chip hardware, including a "considerably increased" number of registers and allowing new flexibility in how code is executed on a particular processor, avoiding code optimizations for a "specific processor."
The patents describe the technology as incorporating instruction-level parallelism "generated at run-time, rather than scavenged, improving efficiency and performance while reducing power dissipation per task. The number of program registers is increased considerably, and over-specification of binary code for a specific processor is avoided, replaced by mechanisms which may ensure that software for prior versions of the processors automatically utilize additional execution resources in future versions."
The patent description further notes, "these enhancements also permit virtually substantially all inner loops to be aggregated to varying degrees, including those that cannot be unrolled by compilers, increasing IPC by maximizing utilization of multiple execution units."
Apple's expanding chip technology portfolio
The nearly decade long research related to macroscalar technology at Apple as outlined in sophisticated detail in the patent filings seems to describe a variety of efforts to maximize the performance of code running on processors using as little power as possible, while also reducing dependance on a particular processor's design, key design goals of the company's custom chips for iOS devices.
This indicates Apple may be gearing up to push more of its unique optimizations into the System on a Chip components it uses in iOS devices, an effort that continued as Apple shifted from its own PowerPC chips to Intel in 2005, its subsequent acquisition of PASemi in 2008 and its purchase of Intrinsity in 2010, initiatives AppleInsider has provided exclusive and frequent coverage on as events have unfolded.
Not content with using Intel's own Silverthorne (since reamed Atom) mobile chip designs on its then in-development iPad, Apple instead secretly licensed design rights to next generation graphics and video IP cores from Imagination Technologies, which it combined with ARM-designed processor cores and technologies from other companies, including Audience noise reduction to build its custom A4 used to power iPad and later iPhone 4, iPod touch and Apple TV.
Last year, Apple introduced its A5 for iPad 2 and iPhone 4S, incorporating more advanced multicore ARM processor cores, dual core SGX543 Imagination GPUs and more advanced sound processing technology from Audience that optimized the performance of Siri's voice recognition.
In addition to Siri, Apple's custom processor designs have helped endow its iOS devices with industry leading graphics and battery performance, neither of which would have been possible had the company relied on Intel's Atom efforts or had simply used generically available SoCs such as NVidia's Tegra line or ARM's own Mali GPU, all of which offer relatively weak graphics performance.
By continuing to develop its own increasingly customized chips incorporating the best technologies available and leaving off features its doesn't use, as well as optimizing its compilers and other development tools to take full advantage of the limited range of chips in its devices, Apple will avoid the problems of broadly licensed platforms like Google's Android, where devices may use a variety of different GPU cores, complicating the efforts of developers who want to create impressive 3D games and other titles.