Moore's Law, the name given to the principle that the speed and capability of computers is expected to double every two years due to advances in microchip technology, is not dead according to Apple A-series chip foundry TSMC, which reasons it is very much still relevant today for a number of reasons.
First outlined in a paper by Intel CEO Gordon Moore in 1965, Moore's Law is a prediction that the number of transistors in a dense integrated circuit will double roughly every year, before revising it to every two years in 1975. While the rule has been relatively accurate over the decades, difficulties with production has led to some believing it isn't sustainable.
Over the years, the cost of a die shrink has gone up in terms of researching techniques, the materials required for the task, and the lower yields of smaller processes, to the point where physics is making it extremely hard to accomplish. The difficulties led to Intel effectively giving up on keeping to Moore's Law, switching the cadence of its chip development from "Tick-Tock" to "Tick-Tock-Tock."
According to a blog post by TSMC, the firm behind the Apple-designed A-series chips used in iOS devices, Moore's Law "is not dead." Head of global marketing Godfrey Cheng reasons industry observers believing in the demise of the Law as taking the rule to mean the performance of the chip must double.
"Since the 2000's, compute performance has largely increased not through the improvement of the transistor clock speed but rather through both silicon architecture innovation and the threading or parallelization of computing workloads," Cheng writes. In that case, performance boosts are not from clock speed boosts but rather by "throwing more transistors at a compute problem," and that Moore's Law is about density of transistors.
For the "elephant in the room" over the death of the Law over die shrinks, Cheng references the announced N5P node for 2021 that enhances the existing N5 node, which uses a 5-nanometer process while providing 7% higher performance compared to N5.
For reference, the current A-series chips use a 7-nanometer process, but Apple is believed to be exploring the use of a 5-nanometer version for the 2020 iPhone's "A14" chip.
An example of TSMC's Chip on Wafer on Substrate technology, using the world's largest silicon interposer with space for two 600mm-squared processors and 8 HBM memory devices.
System-level density is also a factor in improving performance, with limitations in memory caching starting to be a problem. Locating memory physically closer to the cores offers improved latency and a higher bandwidth of data for processing, which will aid fields like AI and autonomous vehicles.
"As a car drives down the roads at highway speeds, every millisecond counts for safety," Cheng adds. "Locating memory close to the edge processing core is vital to reduce latency."
TSMC's advanced packaging techniques offering "tight integration of logic cores with memory" is also cited, with the line between a semiconductor and a system cited as "blurry as the new advanced packaging techniques are silicon wafer based." These techniques include the use of complete systems with a silicon-based interposer or fan-out-based chiplet integration, the ability to stack chips on wafers or wafers on top of wafers prior to integration, all to increase density.
Cheng moves on to reiterate "Moore's Law is about increasing density. Beyond the system level density achieved through advanced packaging, TSMC will continue to grow density at the transistor level. There are many paths available to TSMC for future transistor density improvements."
These improvements can include the use of transistors made of "two-dimensional materials instead of silicon as the channel," described as "we are raiding the periodic table." The stacking of multiple layers of transistors in a "Monolithic 3D Integrated Circuit" could allow a CPU to be placed on aGPU with memory layers sandwiched between.
"Moore's law is not dead," insists Cheng, as "there are many ways to continue to increase density."