Andrew Orr
Taiwan Semiconductor Manufacturing Co. is having lithography tool troubles with the new chip process that is being used to fabricate the next generation of Apple processors.
It was rumored that Apple had ordered the whole production run of 3nm processors from TSMC as far back as December 2020. At the time, it was anticipated that Apple would use the processors throughout the Mac, iPhone, and iPad.
The manufacturer, TSMC, had just recently finished developing its 3nm process. A report from February suggested that TSMC has dedicated the entire production run to Apple.
However, TSMC has delayed the introduction and ramp-up of 3nm due to a need to adopt multi-patterning with EUV lithography from tool supplier ASML, according to EE Times.
"While the high cost of EUV multi-patterning has made the cost/benefit of EUV unattractive, loosening the design rules to minimize the number of EUV multi-patterning layers has led to a much higher die size," analyst Mehdi Hosseini said. "The 'real' 3-nm node will not scale until a higher-throughput EUV system, ASML's NXE:3800E, is available during the second half of 2023."
TSMC will start increasing production of Apple's A17 and M3 processors on the N3 node in the second half of 2023. For the iPhone A17 chip, TSMC will do 82 mask layers with a die size likely in the 100-110mm square range.
That indicates a yield of approximately 620 chips per wafer with a four-month wafer cycle time. So M3 will probably have a die size of 135 to 150mm square and 450 chips per wafer.
TSMC expects its next node, N2, will start production in 2025.
William Gallagher
Christine McKee
AppleInsider Staff
Chip Loder
Malcolm Owen
5 Comments
TSMC N3 (And N3E maybe) has 50% or lower yield on a 110-130 mm2 chip.
Insiders say Samsung’s 3GAP updated PDK outperforms TSMC 3nm. The only question now is the yield.
If Samsung’s 3nm yield exceeds TSMC, expect Apple to move back to Samsung foundry.
Nothing in the source article (other than the headline and lede!) suggests any of this is unexpected, or that TSMC is "struggling" or "straining" any more than would be expected in such a transition. It even quotes an analyst saying that yields are at a "healthy level at this stage in N3 development." It also points out that Apple's deal with TSMC accounts for lower yields in the early N3 ramp-up stages.
Anandtech has a decent article exploring the TSMC 3nm roadmap, here: https://www.anandtech.com/show/18833/tsmc-details-3nm-evolution-n3e-on-schedule-n3p-n3x-deliver-five-percent-gains