Malcolm Owen
The initial benchmarks for the Apple Silicon Developer Transition Kit reveal Apple is very slightly under-clocking the A12Z Bionic chip inside the developmental hardware, with Rosetta 2 also impacting performance.
One week after Apple announced its move from Intel chips to Apple Silicon and the creation of the Developer Transition Kit at WWDC 2020, the first benchmarks of the DTK have surfaced. Results found in Geekbench 5's online browser for "VirtualApple" reveals systems bearing the name "eperm-d995af6e2ef02771," which is thought to be the identifier for the DTK.
The eight results found and uploaded on June 20 are all listed as having "VirtualApple 2,400MHz (4 cores)" as the processor, referencing the A12Z being used inside the DTK. A full breakdown of the results indicates the device uses "macOS 11.0" as its operating system, and has 16 gigabytes of memory.
In terms of performance, the single-core tests resulted in a range of between 736 and 844 points and an average of 811. For multi-core benchmarks, the range is from 2,582 to 2,962, with an average score of 2,781.
These results are considerably lower than the 1,118 single-core and 4,625 multi-core benchmarks of the 12.9-inch iPad Pro which also uses the A12Z Bionic, but there are a few reasons that could be the case. For a start, Apple is running the A12Z at a slower 2.4GHz in the DTK, instead of the 2.5GHz clock in the iPad Pro line, though at this time it is unclear why this is the case.
Another interfering factor is the benchmark itself. Rather than using a native ARM-based app that runs on Apple Silicon, it is likely that benchmarks are being carried out using Geekbench 5's macOS client. As Apple introduced Rosetta 2 as a a translator to convert apps meant for Intel-based Macs to function on Apple Silicon, it is highly likely that this introduces some overhead that affects the benchmark's score.
Though the benchmarks may be disappointing to some, as they are below the results of the current range of Mac mini models, there are still a few more points to bear in mind. For a start, the DTK is intended as a system for developers to test out software in development for the new Apple Silicon-based Macs, and are not meant to be used as a demonstration of Apple Silicon's Performance.
It is also highly likely that Apple will make changes to the hardware before it ships its first consumer-based Apple Silicon model, including altering the chip itself as well as refining other components. Furthermore, performance improvements are almost certainly going to be made to speed up macOS Big Sur itself and Rosetta 2.
William Gallagher
Christine McKee
AppleInsider Staff
Chip Loder
48 Comments
Being a developer ARM speed is not important for now. It’s all about testing your builds & that’s more than sufficient for now. This is not a consumer ARM to compare with the current lineup.
I wonder: is it possible that the upcoming Mac-specific Apple Silicon chips might include features specifically designed to accelerate Rosetta 2?
They can design anything they like now. Maybe smoothing the transition by accelerating Rosetta 2 would be a good move. Perhaps just for the first couple generations. They could drop it once MacOS drops support for Rosetta 2.
I know people are waiting to see what kind of numbers this machine puts out, but in a recent interview with John Gruber Apple’s Craig Federighi wanted to stress that the Developer Transition Kit that was released this week should not be compared to any future consumer product.
“Even that DTK hardware, which is running on an existing iPad chip that we don’t intend to put in a Mac in the future, it’s just there for the transition, the Mac runs awfully nice on that system.”
“It’s not a basis on which to judge future Macs, of course, but it gives you a sense of what our silicon team can do when they’re not even trying,” Federighi continued. “And they’re going to be trying.”
Wondering what if the production A-based Macs coming end of the year actually ship with an A14Z chip instead (since A14 is going to be in this year's iPhone 12s), and that chip includes plentiful of specific-advancements meant for Rosetta 2 and Big Sur as compared to the A12Z in DTK?
:D
I’m pretty sure Rosetta only uses the “big” cores which is why these results show up as a 4 core CPU and not 8. You also can’t rely on the reported clock speed. These results are from a kit that isn’t supposed to be benchmarked running an x86-64 translation to Aarch64. They shouldn’t be used to infer anything about native ARM performance.